CPU Bi-Endian support of RK3399

[mschulz]

Hello!

According to ARM the Endian support of the ARMv8 CPUs may vary depending on architecture/model/manufacturer. Therefore I would like to learn whether the RK3399 does support big-endian mode of operation before I decide to order that board. I have written a small test code (32bit ARM!):

Code:

#include <stdio.h>

int main(int argc, char**argv)
{
   (void)argc; (void)argv;

   int tmp = 0;

   printf("Trying to switch endianess\n");

   asm volatile("setend be; str %0, %1; setend le"::"r"(0xdeadbeef),"m"(tmp));

   printf("Value in tmp is %08x, written was %08x\n", tmp, 0xdeadbeef);

   return 0;
}

The code does nothing extraordinary, it just switches the CPU mode to BE, stores variable in memory and switches back to LE, which is most likely the default mode on RK3399. I would like someone to compile this code in 32bit mode and test. There, three things can happen:
1. The "setend" instruction is obsolete and CPU is told to throw an exception on that instruction. In that case sigsegv is thrown and program ends without any output on the console.
2. The "setend" instruction is executed but the CPU does not support BE mode. In that case "Value in tmp is deadbeef, written was deadbeef" will show on the console
3. The "setend" instruction is executed and the CPU supports BE mode. In that case "Value in tmp is efbeadde, written was deadbeef" will show on the console.

Thanks for the help.

[tuxd3v]

Hello!

According to ARM the Endian support of the ARMv8 CPUs may vary depending on architecture/model/manufacturer. Therefore I would like to learn whether the RK3399 does support big-endian mode of operation before I decide to order that board. I have written a small test code (32bit ARM!):
(...)
The code does nothing extraordinary, it just switches the CPU mode to BE, stores variable in memory and switches back to LE, which is most likely the default mode on RK3399. I would like someone to compile this code in 32bit mode and test. There, three things can happen:
1. The "setend" instruction is obsolete and CPU is told to throw an exception on that instruction. In that case sigsegv is thrown and program ends without any output on the console.
2. The "setend" instruction is executed but the CPU does not support BE mode. In that case "Value in tmp is deadbeef, written was deadbeef" will show on the console
3. The "setend" instruction is executed and the CPU supports BE mode. In that case "Value in tmp is efbeadde, written was deadbeef" will show on the console.

Thanks for the help.

Hi,
Supporting mixed-endianness in armv8 is optional..
AFAIK armv8 is littleEndian by default
But if the implementer choose , it can support BigEndian too.

ARMv6 'setend' intruction,is deprecated in armv8-a( Only Supported in armv6 and armv7 )..
Therefore you would receive an error by the assembler in compilation process, regarding to 'setend', running in aarch64..

Maybe, if you are in aarch32 mode you can do that, with SCTLR_EL1 bit[ 8 ]
If you can ,
It should be possible big endian/Litle endian on data access, and default litle endian in fetching program code..

[mknawabi]

can you give specifics as to how you would compile the code in 32bit mode? do you mean running an arm 32bit kernel vs aarch64?