Purchase Rock64 V3?

[richardk]

So I've seen that some people have the V3, and I particularly desire one (or a couple) based on the RTC battery.  How does a person specifically order a Rock64 V3, and not get old V2 stock?  Thanks.

[Luke]

So I've seen that some people have the V3, and I particularly desire one (or a couple) based on the RTC battery.  How does a person specifically order a Rock64 V3, and not get old V2 stock?  Thanks.

Only V3 ship at this time, as V2 is effectively phased out.

You need to specify to shipping if you require rev 3. Please see comments below.

[mcerveny]

Only V3 ship at this time, as V2 is effectively phased out.

I have very different info.
I recommend to send query to "sales at pine64 dot org".The last answer was:
- Rock64-1GB Version 3 estimate will be available in end of July.
- There are limited quantities for Rock64-4GB Version 3 available. Please make note when you order.

[Luke]

Only V3 ship at this time, as V2 is effectively phased out.

I have very different info.
I recommend to send query to "sales at pine64 dot org".The last answer was:
- Rock64-1GB Version 3 estimate will be available in end of July.
- There are limited quantities for Rock64-4GB Version 3 available. Please make note when you order.

Good to know and thank you for correcting me!

[mcerveny]

"sales at pine64 dot org" informed me that there are no plans to produce Rock64-1G or Rock64-2G version 3 for now.

[z4v4l]

actually Tllim said it a long time ago, that only the 4GB model will be LTS (due to maintenance complexities).
tell me, i probably tired everybody with this question, but still, are uhs-i modes working ok on v3? i mean without any soldering or stuff. is it stable? have you tested speeds? i guess it should deliver around 70+ MB/s with good cards, (given the 150 MHz limit put by rockchip).

[mcerveny]

TL;DR: UHS-I modes ? Yes ! It is working with factory integrated HW patch and patch to DTS. My cheap SanDisk Ultra "speed up to 80 MB/s" (UHS-I).

Code:

# iozone -e -I -a -s 100M -r 4k -r 1024k -i 0 -i 1 -i 2
<snip>
                                                              random    random     bkwd    record    stride                                    
              kB  reclen    write  rewrite    read    reread    read     write     read   rewrite      read   fwrite frewrite    fread  freread
          102400       4     4462     4574    12393    12390     9799     5164                                                          
          102400    1024    12418    26892    67185    67292    66996    30158

Long version:

• * There is design fault in official "version 3 production schematics". The embedded diode in Q8502 changes FET to magic smoke or any component on 1.8V supply (VCC_18) not aware about 2.7V (3.3V - Source-Drain Diode Forward Voltage). Maybe published schema is total fake to disable copying (see also difference in 5V PIN2+PIN4).
  
  
  
  
• * Fault is resolved by factory patch (replaced Q8502 with some other rotated transistor and pullup resistor).
  
  
  
  
• * I had to prepare patch to DTS to activate voltage switching and enable UHS modes. This patch is not in standard distributions now.
  
  
• * Some testing and observation with patch.
  
  Code:

  # ### switched to 1.8V (gpio-30 is hi)
# head -4 /sys/kernel/debug/gpio
GPIOs 0-31, platform/pinctrl, gpio0:
gpio-0   (                    |vcc_host_5v         ) out hi    
gpio-2   (                    |vcc_host1_5v        ) out lo    
gpio-30  (                    |?                   ) out hi    

# ### vccio3 domain switched to 1.8V
# tail -4 /sys/kernel/debug/regulator/regulator_summary
vccq_sd                          1    3      0  1800mV     0mA  1800mV  3300mV
    ff500000.dwmmc                                               1800mV  1950mV
    ff100000.syscon:io-domains                                      0mV     0mV
    deviceless                                                      0mV     0mV

# ### mmc1 (sdcard) is running 150 MHz
# cat /sys/kernel/debug/mmc1/clock
150000000

# ### booted to ultra high speed
# dmesg | grep mmc1      
[    4.379677] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[    4.520429] mmc_host mmc1: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
[    4.913212] mmc1: new ultra high speed SDR104 SDHC card at address aaaa
[    4.917711] mmcblk1: mmc1:aaaa SC16G 14.8 GiB
  
  
• * There are more tests with "Samsung EVO UHS-I (orange)". Also with 200MHz because Synopsys DesignWare Mobile Storage Host Controller was designed so as I wrote elsewhere.
  
  Code:

  # ### without patch
# dmesg | grep mmc1
[    3.529051] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[    3.581582] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
[    3.581652] mmc1: new high speed SDHC card at address 0001
[    3.582126] mmcblk1: mmc1:0001 BB1QT 29.8 GiB

# iozone -e -I -a -s 100M -r 4k -r 1024k -i 0 -i 1 -i 2
                                                              random    random     bkwd    record    stride                                    
              kB  reclen    write  rewrite    read    reread    read     write     read   rewrite      read   fwrite frewrite    fread  freread
          102400       4     1876     2460     7732     7751     8763     1701                                                          
          102400    1024    17982    13841    23239    23259    23261    12913                                                          

# ### with patch
# dmesg | grep mmc1
[    3.881125] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[    3.950459] mmc_host mmc1: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
[    4.465921] mmc1: new ultra high speed SDR104 SDHC card at address 0001
[    4.494979] mmcblk1: mmc1:0001 BB1QT 29.8 GiB

# iozone -e -I -a -s 100M -r 4k -r 1024k -i 0 -i 1 -i 2
                                                              random    random     bkwd    record    stride                                    
              kB  reclen    write  rewrite    read    reread    read     write     read   rewrite      read   fwrite frewrite    fread  freread
          102400       4     3781     3598    14463    14509    14485     2230                                                          
          102400    1024    28554    29160    67172    67270    67152    19281                                                          

# ### with "200MHz" patch (not recommended)
# cat 200.patch
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index 9d848967..2b15b339 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -698,7 +698,7 @@
        cap-mmc-highspeed;
        cap-sd-highspeed;
        disable-wp;
-       max-frequency = <150000000>;
+       max-frequency = <200000000>;
        num-slots = <1>;
        pinctrl-names = "default";
        pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;

# dmesg | grep mmc1
[    3.333112] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[    3.402596] mmc_host mmc1: Bus speed (slot 0) = 200000000Hz (slot req 200000000Hz, actual 200000000HZ div = 0)
[    3.793574] mmc1: new ultra high speed SDR104 SDHC card at address 0001
[    3.794066] mmcblk1: mmc1:0001 BB1QT 29.8 GiB

# iozone -e -I -a -s 100M -r 4k -r 1024k -i 0 -i 1 -i 2
                                                              random    random     bkwd    record    stride                                    
              kB  reclen    write  rewrite    read    reread    read     write     read   rewrite      read   fwrite frewrite    fread  freread
          102400       4     4024     3762    15374    15388    15330     1988                                                          
          102400    1024    29919    30415    86725    87439    86829    17539

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