RISC V in the future?
#15
(08-20-2019, 11:40 AM)z4v4l Wrote: if you think, that the variable length of x86 instructions make them run slowly or need more power, then you shouldn't even start that discussion - that shows you really have no idea of that, just read some wikipedia or what. learn how instructions are fetched and compare how many instructions per clock x86 executes and how many of them execute its competitors. hint - instruction length and intsructions per clock speed of execution are not related. and fyi x86 code is more dense than RISC code, its instructions variable length even speeds things up, because more instructions are in the I-cache. and they aren't fetched byte per clock, oh it's ridiculous.

I am open, i just wondered what exactly cool features of RISC-V made you its fan, even before its real appearance. and you talked about everything, even mentioned Ballmer, but you didn't say a thing about those features. which pretty much shows it all.

My god ... you dont get it.
What I was trying to explain you is that x86 ISA is more complex than the one you have in ARM.
And it's also a fact that, on average, x86 CPU instructions requires more cycle to run. This is a fact and not debatable. 
I dont care if you dont agree. (ask yourself why intel has failed on mobile and iot devices)

For the RISC advantage I already told you ... I will repeat for the last time:
- The cost. Especially on IoT devices
- freedom. But forget this one if you cannot even understand why Linux is good
If you want more reason (which are consequences of the 2 1st arguments):
- I think in the future you will see several implementation at lower cost. We can expect good innovation 
- more competition cannot be bad. Maybe that will even put pressure on ARM resulting on good inovation also on ARM side
But this is nothing for you. Not for me.

Will it fail ? We dont know. Let's wait and see.
If we were all thinking like you, we would still have Windows Millennium. 

But I wont continue the discussion further because we keep saying the same things.

again:
You will cut my response as you wish and you will say I'm stupid because blabla x86 is as efficient as ARM and I should document on that, And blabla instruction length. 
I will say you are wrong blabla. You dont know what you are talking about. blabla more clock cycle.
goto again


Messages In This Thread
RISC V in the future? - by phoenix - 07-25-2019, 11:20 AM
RE: RISC V in the future? - by Luke - 07-25-2019, 04:58 PM
RE: RISC V in the future? - by RMJ250 - 07-25-2019, 10:40 PM
RE: RISC V in the future? - by hmuller - 07-30-2019, 07:10 PM
RE: RISC V in the future? - by z4v4l - 08-18-2019, 05:08 PM
RE: RISC V in the future? - by lfen - 08-19-2019, 02:09 AM
RE: RISC V in the future? - by jack1 - 09-01-2019, 04:11 PM
RE: RISC V in the future? - by z4v4l - 08-20-2019, 12:22 AM
RE: RISC V in the future? - by lfen - 08-20-2019, 02:02 AM
RE: RISC V in the future? - by z4v4l - 08-20-2019, 03:16 AM
RE: RISC V in the future? - by lfen - 08-20-2019, 04:29 AM
RE: RISC V in the future? - by z4v4l - 08-20-2019, 07:00 AM
RE: RISC V in the future? - by lfen - 08-20-2019, 07:35 AM
RE: RISC V in the future? - by z4v4l - 08-20-2019, 11:40 AM
RE: RISC V in the future? - by lfen - 08-20-2019, 12:36 PM
RE: RISC V in the future? - by z4v4l - 08-21-2019, 03:36 PM
RE: RISC V in the future? - by Arwen - 08-28-2019, 10:51 AM
RE: RISC V in the future? - by kaylios - 09-02-2019, 02:53 AM
RISC V in the future? - by Paraplegic Racehorse - 09-03-2019, 07:20 PM
RE: RISC V in the future? - by kaylios - 09-04-2019, 03:00 PM

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