Pogo pins power clarification - reading schematics

[dsimic]

Nope, the two "DCIN" and "DCIN " nets are both connected to only the one pogo pin. The other pogo pin is "USB-5V" and connects somewhere else and has a different purpose. There aren't any two pogo pins that are connected to the same place to increase current-carrying capacity.

When we were talking about "DCIN" vs "DCIN ", we were only just trying to guess that maybe the USB C connector wasn't actually on the same net as the one pogo pin. But we were wrong; "DCIN" and "DCIN " are in fact connected together. That's indicated both by the schematics and an experimental connectivity test.

I've finally managed to go through the PinePhone schematic, so here are my thoughts.

Based on page 9 of the PinePhone 1.2b schematic, pogo pin #1 goes to DCIN, while pogo pin #5 goes to USB-5V.  According to page 6 of the schematic and the AXP803 (PMIC) datasheet, DCIN is the phone's USB power source.  Also, PS on the schematic is the "combined" system power source produced by the PMIC.  On page 6 of the schematic, USB-5V is generated from PS using a LP6226, which is a DC/DC converter configured for 5 V at its output, providing up to 1.5 A.

Thus, the pogo pin #5 (USB-5V) provides stabilised 5 V on USB-5V, up to 1.5 A, which can also be switched on and off using a GPIO line on the SoC.  I do not see the use of that GPIO line in the PinePhone DTS file.

According to page 13 of the schematic, USB-5V (which equals to both the pogo pin #5 and the LP6226 output) go to the input of a LPW5206, which is a current-limiting power switch.  The output of the LPW5206 goes to DCIN, while this power path is enabled or disabled using the N_VBUSEN pin on the PMIC, which should be associated with the USB OTG mode.  This power path is disabled by default, using a pull-down resistor.

Thus, the pogo pin #5 (USB-5V) can also be used as a USB power source, depending on the OTG state of the phone's USB port.

This is very strange.  I really don't know whether this is me misreading the schematic, or a bug in the schematic, but I cannot figure out why should the pogo pin #5 behave differently depending on the mode of the phone's USB port (current sink or source)?

The pogo pin #1 (DCIN) is connected directly to the phone's USB power input (i.e. USB charger).  Again, this is very strange because the wiki page states that one of the pogo pins (VBAT) is connected to the battery, which simply isn't right.  Again, it might be just me misreading the schematic, so please correct me if I'm wrong.

If my findings are correct, the recently announced keyboard case will need to have built-in logic for the battery charging, using 5 V from the DCIN pogo pin, as well as the logic for boosting the battery voltage to 5 V while discharging it and feeding power back to the DCIN pogo pin.  That would be inefficient, but there's no connection to the phone's battery through the pogo pins, so the only way for the keyboard case to exchange power is through the pogo pin #1 (DCIN), which runs at 5 V.

Furthermore, the keyboard case will need to have even more built-in logic that would ensure to stop discharging the case battery upon detecting that a USB charger is connected to the phone, because the case battery must not feed power to the DCIN pogo pin when a USB charger is connected.  This is all rather complicated, pretty inefficient, and, quite frankly, messy. :/

Again, if all this is correct, the wiki page needs to be corrected ASAP.

Otherwise, it's also still not clear _what_ the current-carrying capacity is. The wiki says 500 mA in one case, but why is that? Did the author of that just assume that it's 500 mA because that's what one of the USB standards is supposed to provide? Or can somebody show that some component in the schematics actually provides 500 mA (or more, or less)?

Unfortunately, I am not sure about that.  The above-described LP6226 regulator, which when enabled provides 5 V on the USB-5V line, has 1.5 A as the current limit.