Pogo pins power clarification - reading schematics
#9
(01-08-2021, 04:59 AM)scholbert Wrote: The PMIC components on modern platforms are complex logic.
Intense reading of the datasheet may be helpful... or compare it with another reference design:
https://files.pine64.org/doc/Pine%20A64%...elease.pdf

Anyway, it would be a solution to pull to phone apart and use a logic tester to find out where the pins are connected to.

(01-08-2021, 04:59 AM)scholbert Wrote: I enjoy this conversation, but to get clearness we need some reverse engineering... or definite information from the Pine64 team!

For sure, I agree with all of it.

I did do a little bit of reading of the PMIC datasheet before. I found that ACIN and VBUS are allowed to be two distinct power sources, _or_ they are allowed to be connected together as one single power source. So we definitely could have the two separate DCIN nets, or one common connected one. Either way would make sense from the point of view of the PMIC.

(01-08-2021, 04:59 AM)scholbert Wrote: Another thing i realized by having a closer look at the schematic again (and a comparison with the Pine A64+ schematic as well).
It seems to me that there are two different DCIN nets with barely the same name... see my screenshots attached.
My next guess is there could be net names like "DCIN" and "DCIN ".
The red circles may point the same nets then... hope you know what i mean.

Wow, good find!

I did wonder before why there was a separate drawing connecting DCIN to itself (screenshot attached). Now I see that one is "DCIN" and the other is "DCIN ".

Now I'm not sure if they're really supposed to be one net, or actually two isolated nets. But if they _are_ separated, we have an idea where or why. Neat!


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RE: Pogo pins power clarification - reading schematics - by bokomaru - 01-08-2021, 08:38 PM

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