Thinking about memory bottlenecks and the potential for DDR5 in future builds
#1
Hey everyone,
I’ve been a long-time lurker here and a huge fan of the Pine64 ecosystem for a few years now. My journey started with a Pinebook Pro that I used as a dedicated "distro-hopping" machine, and more recently, I’ve been experimenting with a small cluster of Quartz64 boards for some home automation and a localized private cloud.
One thing that’s been on my mind lately, especially as I start pushing more containerized workloads and heavier database tasks, is the "memory ceiling" we often hit with SBCs. I’ve noticed a specific point in a few recent dev threads discussing how we can better optimize swap and zram, but it really makes me wonder about the hardware side of things.
I recently did a refresh on my main desktop/home server, moving it up to a 16GB kit of DDR5-4800MHz memory. It’s that PC5-38400 spec, and honestly, seeing the jump in raw bandwidth compared to my older DDR4 rig was a bit of a wake-up call. It’s not just about the capacity; it’s how quickly the system can move data for multitasking and heavy I/O. It made me realize how much I’ve grown accustomed to the snappiness of higher-frequency RAM in the x86 world, and it left me wishing for a bit of that "oomph" in my ARM projects.
I know we’re dealing with completely different power envelopes and thermal constraints here, but as we see more powerful SoCs coming down the pipeline, I can't help but dream of a Pine64 board that supports something like the PC5-38400 standard. Even if it was soldered LPDDR5 to save on space, that extra bandwidth would be a game-changer for things like local LLMs or high-speed data processing at the edge.
I’ve been trying to find ways to squeeze more life out of my current 4GB and 8GB LPDDR4 setups, but there’s only so much software tuning can do when you're physically limited by the bus speed.
Does anyone here have insight into the current SoC roadmaps—are we likely to see DDR5 support in the next generation of boards, or do the power requirements and complexity of routing those high-frequency traces make it a "no-go" for affordable hobbyist hardware for the time being?
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Thinking about memory bottlenecks and the potential for DDR5 in future builds - by xiley32050 - 10 hours ago

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