PCIe not working on custom board (soquartz)

[dferrg]

I designed a custom board for the soquartz and I'm currently testing it.
HDMI, ethernet and SD work correctly, but the PCIe card (ASM1064) is not being detected.
Tried booting manjaro and debian (from this repo), both using rk3566-soquartz-cm4.dtb, and the logs look like this in both cases:

Code:

# lspci
00:00.0 PCI bridge: Fuzhou Rockchip Electronics Co., Ltd Device 3566 (rev 01)
# dmesg | grep pci
[    0.201109] vcc3v3_pcie: will resolve supply early: vin
[    0.201629] reg-fixed-voltage 3v3_pcie: Looking up vin-supply from device tree
[    0.202348] vcc3v3_pcie: supplied by vcc12v_dcin
[    0.203523] vcc3v3_pcie: 3300 mV, enabled
[    0.204115] reg-fixed-voltage 3v3_pcie: vcc3v3_pcie supplying 3300000uV
[    0.458682] rockchip-dw-pcie 3c0000000.pcie: Looking up vpcie3v3-supply from device tree
[    0.460417] rockchip-dw-pcie 3c0000000.pcie: host bridge /pcie@fe260000 ranges:
[    0.461198] rockchip-dw-pcie 3c0000000.pcie: Parsing ranges property...
[    0.461876] rockchip-dw-pcie 3c0000000.pcie:       IO 0x0301000000..0x03010fffff -> 0x0001000000
[    0.462799] rockchip-dw-pcie 3c0000000.pcie:      MEM 0x0302000000..0x033fffffff -> 0x0002000000
[    0.464088] rockchip-dw-pcie 3c0000000.pcie: iATU unroll: enabled
[    0.464717] rockchip-dw-pcie 3c0000000.pcie: Detected iATU regions: 8 outbound, 8 inbound
[    1.572091] rockchip-dw-pcie 3c0000000.pcie: Phy link never came up
[    1.573002] rockchip-dw-pcie 3c0000000.pcie: PCI host bridge to bus 0000:00
[    1.573708] pci_bus 0000:00: root bus resource [bus 00-0f]
[    1.574260] pci_bus 0000:00: root bus resource [io  0x0000-0xfffff] (bus address [0x1000000-0x10fffff])
[    1.575189] pci_bus 0000:00: root bus resource [mem 0x302000000-0x33fffffff] (bus address [0x02000000-0x3fffffff])
[    1.576283] pci_bus 0000:00: scanning bus
[    1.576765] pci 0000:00:00.0: [1d87:3566] type 01 class 0x060400
[    1.577403] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]
[    1.578201] pci 0000:00:00.0: supports D1 D2
[    1.578631] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[    1.579206] pci 0000:00:00.0: PME# disabled
[    1.584472] pci_bus 0000:00: fixups for bus
[    1.584924] pci 0000:00:00.0: scanning [bus 01-ff] behind bridge, pass 0
[    1.585807] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-0f] (conflicts with (null) [bus 00-0f])
[    1.586886] pci_bus 0000:01: scanning bus
[    1.591578] pci_bus 0000:01: fixups for bus
[    1.592037] pci_bus 0000:01: bus scan returning with max=01
[    1.592609] pci 0000:00:00.0: scanning [bus 01-ff] behind bridge, pass 1
[    1.593288] pci_bus 0000:00: bus scan returning with max=ff
[    1.593875] pci 0000:00:00.0: BAR 6: assigned [mem 0x302000000-0x30200ffff pref]
[    1.594626] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
[    1.595500] pcieport 0000:00:00.0: assign IRQ: got 46
[    1.601107] pcieport 0000:00:00.0: PME: Signaling with IRQ 47
[    1.601864] pcieport 0000:00:00.0: saving config space at offset 0x0 (reading 0x35661d87)
[    1.602684] pcieport 0000:00:00.0: saving config space at offset 0x4 (reading 0x100507)
[    1.603475] pcieport 0000:00:00.0: saving config space at offset 0x8 (reading 0x6040001)
[    1.604319] pcieport 0000:00:00.0: saving config space at offset 0xc (reading 0x10000)
[    1.605107] pcieport 0000:00:00.0: saving config space at offset 0x10 (reading 0x0)
[    1.605863] pcieport 0000:00:00.0: saving config space at offset 0x14 (reading 0x0)
[    1.606618] pcieport 0000:00:00.0: saving config space at offset 0x18 (reading 0xff0100)
[    1.607416] pcieport 0000:00:00.0: saving config space at offset 0x1c (reading 0xf0)
[    1.608209] pcieport 0000:00:00.0: saving config space at offset 0x20 (reading 0xfff0)
[    1.609000] pcieport 0000:00:00.0: saving config space at offset 0x24 (reading 0x1fff1)
[    1.609789] pcieport 0000:00:00.0: saving config space at offset 0x28 (reading 0x0)
[    1.610544] pcieport 0000:00:00.0: saving config space at offset 0x2c (reading 0x0)
[    1.611298] pcieport 0000:00:00.0: saving config space at offset 0x30 (reading 0x0)
[    1.612079] pcieport 0000:00:00.0: saving config space at offset 0x34 (reading 0x40)
[    1.612853] pcieport 0000:00:00.0: saving config space at offset 0x38 (reading 0x0)
[    1.613611] pcieport 0000:00:00.0: saving config space at offset 0x3c (reading 0x2012e)
[    1.727024] ehci-pci: EHCI PCI platform driver
[    1.729180] ohci-pci: OHCI PCI platform driver
# uname -a
Linux buildroot 5.17.0-rc3 #1 SMP PREEMPT Wed Feb 16 00:41:25 UTC 2022 aarch64 GNU/Linux

I connected RX, TX and REFCLK differential pairs, and checked length matching for every pair (although not between pairs). Also connected nRST net. Traces are about 2-3 inches long. 

Am I missing something with my board design? Is PCIe supposed to currently work on soquartz?
Any help would be appreciated.

[dferrg]

Forgot to mention the line CLK_nREQ, which is connected too. Also, I just checked continuity for every line in my board and everything looks ok.