SOPine modules stay off at reboot?
#31
Some debugging later I've figured out why reset wasn't working: I built my u-boot in such a way that it contained SCP coprocessor firmware. Apparently that firmware can cause that a reboot of Linux doesn't trigger the reset line at all.

Building u-boot without the SCP firmware solves the problem.

I've put instructions on building u-boot for the SoPine (including a version for in the SPI flash chip and flashing instructions) here: https://github.com/renzenicolai/uboot-pi...tructions/

My next goal is going to be submitting the clusterboard devicetree and configuration file to upstream u-boot, let's see how that goes  Smile .

Another note: instead of doing the diode modification the reset problem can also be fixed by removing the resistors between the inverters (U54/U55) and the reset lines of the SoPine modules. By doing that you effectively disable the reset circuit (causing the reset button to do nothing at all), but in return the boards will always reset correctly and you solve the design mistake (the inverter drives directly against the SoC itself, which tries to pull the reset line low for rebooting but can't as the inverter keeps the line high). The resistors are in a row between the chips and the SoPine modules.
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#32
(07-23-2021, 05:41 PM)renze Wrote: Some debugging later I've figured out why reset wasn't working: I built my u-boot in such a way that it contained SCP coprocessor firmware. Apparently that firmware can cause that a reboot of Linux doesn't trigger the reset line at all.

Building u-boot without the SCP firmware solves the problem.

Unfortunately, I haven't experimented with Crust myself (yet), so I cannot provide any help or further insight.

(07-23-2021, 05:41 PM)renze Wrote: Another note: instead of doing the diode modification the reset problem can also be fixed by removing the resistors between the inverters (U54/U55) and the reset lines of the SoPine modules. By doing that you effectively disable the reset circuit (causing the reset button to do nothing at all), but in return the boards will always reset correctly and you solve the design mistake (the inverter drives directly against the SoC itself, which tries to pull the reset line low for rebooting but can't as the inverter keeps the line high). The resistors are in a row between the chips and the SoPine modules.

Sounds good, but have you actually tested this hardware fix?  This is probably another way to quickly fix the Clusterboard reboot issue, but as you've already described, this fix also renders the reset button inoperable, which may not be desired.  Have you checked whether this fix prevents the RTC backup batteries from being discharged when the Clusterboard is powered on?  Also, please keep in mind that this fix doesn't prevent the batteries from becoming charged by the VCC_RTC outputs of the AXP803 PMICs on installed SOPine modules.  That power path should always be disabled by adding a Schottky barrier diode, regardless of any further modifications, if the RTC backup batteries will be installed.

As a note, I've spent some time debugging some RTC-related issues and journal corruption (see this issue for further information), so having the RTC backup batteries installed would be highly advisable.
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#33
(07-28-2021, 03:20 AM)dsimic Wrote: Sounds good, but have you actually tested this hardware fix?  This is probably another way to quickly fix the Clusterboard reboot issue, but as you've already described, this fix also renders the reset button inoperable, which may not be desired.  Have you checked whether this fix prevents the RTC backup batteries from being discharged when the Clusterboard is powered on?  Also, please keep in mind that this fix doesn't prevent the batteries from becoming charged by the VCC_RTC outputs of the AXP803 PMICs on installed SOPine modules.  That power path should always be disabled by adding a Schottky barrier diode, regardless of any further modifications, if the RTC backup batteries will be installed.

As a note, I've spent some time debugging some RTC-related issues and journal corruption (see this issue for further information), so having the RTC backup batteries installed would be highly advisable.

Yes, I've removed the diode fix and the resistors connecting the reset circuit to the SOPine modules and the reboot issues are gone.
A proper fix would require the buffer ICs to be replaced by open collector output buffers, which isn't really feasible as a modification. Maybe Pine64 could do a new revision of the board that fixes both the reset circuit and the problems with feeding power back into the RTC battery from the installed modules.
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