09-30-2016, 10:03 AM
Hello all.
I am new to this cpu, and its instruction set. So I found this very helpful. I believe you will too, if you are working on stuff at this level:
https://static.docs.arm.com/den0024/a/DEN0024.pdf
Nearly all of my experience is in x86/amd64 kit, which is very different from aarch64/arm64. Being in the process of evaluating (lab'ng) the pine64+ 2G, I am finding it less performing than I need it too be. Then it occured to me, that I am using it as an x86/amd64 part, when in fact, it is a aarch64/arm64 part. And to use this board properly, I have to build according to its abilities, which are found in its instruction set.
This is a RISC processor. Throwing CISC vectored commands at it are going to hurt it --- dramatically. I know very little about its instruction set, at this point in time, so I begin here. At the beginning.
Seems to me, in addition to the missing mali code, that there are core features of this architecture that are not being used, even though they are available. Kind of like using single threaded code on a multi-threaded processor (hello dosbox). The limit is in the software, not the hardware.
I look forward to seeing what this kit can really do, when fully utilized by our build environment(s) (BE).
One last thing. In closed source environments, we would not even have access (hello mali) to this level of development, let alone be able to improve upon it. I am glad too work in open source products.
David
I am new to this cpu, and its instruction set. So I found this very helpful. I believe you will too, if you are working on stuff at this level:
https://static.docs.arm.com/den0024/a/DEN0024.pdf
Nearly all of my experience is in x86/amd64 kit, which is very different from aarch64/arm64. Being in the process of evaluating (lab'ng) the pine64+ 2G, I am finding it less performing than I need it too be. Then it occured to me, that I am using it as an x86/amd64 part, when in fact, it is a aarch64/arm64 part. And to use this board properly, I have to build according to its abilities, which are found in its instruction set.
This is a RISC processor. Throwing CISC vectored commands at it are going to hurt it --- dramatically. I know very little about its instruction set, at this point in time, so I begin here. At the beginning.
Seems to me, in addition to the missing mali code, that there are core features of this architecture that are not being used, even though they are available. Kind of like using single threaded code on a multi-threaded processor (hello dosbox). The limit is in the software, not the hardware.
I look forward to seeing what this kit can really do, when fully utilized by our build environment(s) (BE).
One last thing. In closed source environments, we would not even have access (hello mali) to this level of development, let alone be able to improve upon it. I am glad too work in open source products.
David
David, the lip smacking pirate hedgehog. "SHIVER me timbers!"