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+--- Thread: PinePhone Pro not booting (Cap error!, pctl timeout) (/showthread.php?tid=18479)
PinePhone Pro not booting (Cap error!, pctl timeout) - jealda - 07-11-2023
Hello,
today I tried to boot my PinePhone Pro, but it doesn't boot.
- Battery is charged (used external Charger, bought new battery)
- I can connect it to my PC and see the device in MASKROM mode
- no led or vibration is noticable
Trying to boot the phone connected with UART got me following lines.
Code:
U-Boot TPL 2021.10 (Oct 04 2021 - 15:09:26)
Channel 0: col error
Cap error!
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride
lpddr4_set_ctl: channel 0 training failed!
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
read_mr: pctl timeout!Do someone have seen this, or maybe a solution to this problem?
RE: PinePhone Pro not booting (Cap error!, pctl timeout) - jjardon - 10-29-2023
Hi jealda,
I'm seeing exactly the same here; did you manage to fix it?
I've tried to install Tow-Boot from sdcard and pressing the RE button and still getting the same:
Code:
Tow-Boot TPL 2022.07
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB
256B stride
lpddr4_set_ctl: channel 0 training failed!
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
read_mr: pctl timeout!RE: PinePhone Pro not booting (Cap error!, pctl timeout) - DrYak - 11-16-2023
Damn, looks like I too, joined the club of people with broken DRAM.
Booting on SPI: rk2aw + U-Boot's TPL on secondary:
Code:
rk2aw: booted version RK3399/pinephone-pro/2023-08-02/18:13:28
rk2aw: Booted from source 3 (SPI NOR) block=0x00
rk2aw: Will try booting boot block 0x01 on SPI NOR
U-Boot TPL 2023.07-rc6-megi-ppp-00050-g222aa75acee7-dirty (Aug 03 2023 - 15:09:37)
lpddr4_set_ctl: channel 0 training failed!Booting from TowBoot on SD Card:
Code:
Tow-Boot TPL 2022.07
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB
256B stride
lpddr4_set_ctl: channel 0 training failed!
lpddr4_set_rate: change freq to 400000000 mhz 0, 1
read_mr: pctl timeout!SPI rk2aw + Rockchip's ddrbin on Primary:
Code:
rk2aw: booted version RK3399/pinephone-pro/2023-08-02/18:13:28
rk2aw: Booted from source 3 (SPI NOR) block=0x00
rk2aw: Will try booting boot block 0x07 on SPI NOR
DDR Version 1.30 20230417
In
channel 0
CS = 0
MR0=0x98
MR4=0x3
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
CS = 1
MR0=0x18
MR4=0x3
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 0 training failed!
channel 1 training pass!
change freq to 416MHz 0,1
Channel 0: LPDDR4,416MHz
Col error!!!
Cap error!
Channel 1: LPDDR4,416MHz
Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
no stride
channel 1
CS = 0
MR0=0x98
MR4=0x1
MR5=0xFF
MR8=0x8
MR12=0x72
MR14=0x72
MR18=0x0
MR19=0x0
MR24=0x8
MR25=0x0
channel 1 training pass!Damn.
(07-11-2023, 10:50 AM)jealda Wrote: Do someone have seen this, or maybe a solution to this problem?
So, yes. I've joined the club of people seeing that.
(10-29-2023, 03:48 PM)jjardon Wrote: I'm seeing exactly the same here; did you manage to fix it?
Given that it's complaining of not being able to initialize a RAM channel, I'm starting to suspect that "managing to fix it" involves either a chip reflow workstation (for the DIY solution) (Which is way beyond my reach) or a main board replacement (which is expensive).