I made an overview of the GPIO header for the nodes while playing with my Clusterboard prototype, maybe it helps others working on this...
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Maybe someone can verify this against the schematics again...
(02-15-2018, 05:36 AM)xalius Wrote: [ -> ]I made an overview of the GPIO header for the nodes while playing with my Clusterboard prototype, maybe it helps others working on this...
Maybe someone can verify this against the schematics again...
Thanks for doing this. Is there no 3v3VCC? If the I/O's are all 3v3 then the lack of a 3v3 pin seems strange?
(02-15-2018, 05:36 AM)xalius Wrote: [ -> ]I made an overview of the GPIO header for the nodes while playing with my Clusterboard prototype, maybe it helps others working on this...
Maybe someone can verify this against the schematics again...
The pins are numbered differently on the board. One row is 1-10, the other is 11-20.
(03-20-2019, 04:47 PM)AZClusterboard Wrote: [ -> ]The pins are numbered differently on the board. One row is 1-10, the other is 11-20.
Depends on your definition of row. Is it a 10 column, 2 row or a 2 column, 10 row header? Both xalius and I obviously think it's a 10 row, two column header pinout, with pins 1 and 19 marked so you don't get it back-to-front :-P If you have the board oriented so you the ethernet jack is at the back, the document matches the pinout. I would have done it the other way, only because I tend to have the usb ports and on-board LEDs facing me for visibility.
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