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Sopine Complete Guide
#1
Is there any available documentation on further expanding the Sopine baseboard and/or the GPIO pi-2 and euler bus I have an available pin out list and have successfully tested in and out via custom script. As far as i can search there is not actual documentation, i would not consider myself a noob but going through a 207 page specification and only finding information that doesnt have anything todo with what i want to know. If there is something i would like the link, or if anyone is also interested in this I would be willing to collaborate to make a "plain english" documentation source
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#2
(01-30-2018, 09:41 AM)parmleyhunt Wrote: Is there any available documentation on further expanding the Sopine baseboard and/or the GPIO pi-2 and euler bus I have an available pin out list and have successfully tested in and out via custom script. As far as i can search there is not actual documentation, i would not consider myself a noob but going through a 207 page specification and only finding information that doesnt have anything todo with what i want to know. If there is something i would like the link, or if anyone is also interested in this I would be willing to collaborate to make a "plain english" documentation source

The SoPine and baseboard information located at PINE64 wiki site: http://wiki.pine64.org/index.php/PINE_A6..._Main_Page

If any further information is needed, I may able t supply on next week after FOSDEM event on this weekend.

We are welcome your collaborate on the PINE64 wiki and the wiki page already opened to forum user for participation.
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#3
Ive done a little bit of tinkering modifying circuits but have never worked with a processor before none the less an a64, the first question i have is how much of the reserved pins actually have default behaviour, and second does the a64 support gpio interrupts, and third is it possible to convert a in pin to an analog in
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#4
The default config of the pins/GPIOs on the headers is defined in the so called Device Tree (DT). The DT describes the whole SoC and it's connections with their configuration, including the pins. Both the bootloader (u-boot in this case) and the Linux kernel load the DT from a binary file on boot. You can edit the DT source file with a text editor to make changes, and then use the device tree compiler (dtc) to generate a new binary DT blob.

For example the DT source for the A64 with SOPine module and baseboard:

https://git.kernel.org/pub/scm/linux/ker...si?h=v4.15 (SoC DT)
https://git.kernel.org/pub/scm/linux/ker...ts?h=v4.15 (SOPine module DT)
https://git.kernel.org/pub/scm/linux/ker...si?h=v4.15 (SOPine baseboard DT)

You can find a lot of tutorials online about how DT works...

GPIO Interrupts are possible and also configured via DT...

There are no analog inputs on A64...
Come have a chat in the Pine A64 IRC channel >>
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#5
So the DT has to be modified before the edge property of the syfs will become available
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