just came up to say the project is alive and slowly moving forward. well, it's an individual spare time effort, so it's slow as hell.
currently, I am messing around with ci20 board, but cubieboard2 and pine64+ are just lying next to it on my desk. After I finish a first pass of the Sec phase on ci20, I plan to recreate this on both armv7 and armv8 boards in parallel. Sec phase it's like uboot's SPL, kind off. It initializes SDRAM and loads the FW's "core" into it from SD/MMC/NAND etc. The core here is Dxe core, the main internal UEFI part. It has been partially written, but not yet tested - even though most services are RAM only requiring, they don't need peripherals working to provide their functionality, still a solid start sequence and decent memory management are needed. After having the first working (Sec phase - PLLs, SDRAM, SD read, HOB list, PE loader), I'll begin with the second (proper memory manager). And then, I can start to create numerous Dxe drivers doing all the job (mainly storage, network, hdmi/lcd for pretty GUI). Haha. Never expected it to be easy.
Here is a screenshot of a putty output showing Efify happily reports SDRAM init success. Which means it has done with clocks/dividers, uart and sdram.
Meanwhile the Rock64 board has been released. And looks very attractive for this. USB3, 4GB of RAM, and finally SPI NOR which I so badly lack - are all the most desirable things! Kewl. The only annoying thing is not yet available SDRAM init sequence, so that you could at least repeat after it (what else to do if the spec is silent). But this is going to change, thanks to Rockchip's desire to be more open.
Whenever I make progress with my Allwinner boards, which, I believe, are of interest here, I'll report it here.
currently, I am messing around with ci20 board, but cubieboard2 and pine64+ are just lying next to it on my desk. After I finish a first pass of the Sec phase on ci20, I plan to recreate this on both armv7 and armv8 boards in parallel. Sec phase it's like uboot's SPL, kind off. It initializes SDRAM and loads the FW's "core" into it from SD/MMC/NAND etc. The core here is Dxe core, the main internal UEFI part. It has been partially written, but not yet tested - even though most services are RAM only requiring, they don't need peripherals working to provide their functionality, still a solid start sequence and decent memory management are needed. After having the first working (Sec phase - PLLs, SDRAM, SD read, HOB list, PE loader), I'll begin with the second (proper memory manager). And then, I can start to create numerous Dxe drivers doing all the job (mainly storage, network, hdmi/lcd for pretty GUI). Haha. Never expected it to be easy.
Here is a screenshot of a putty output showing Efify happily reports SDRAM init success. Which means it has done with clocks/dividers, uart and sdram.
Meanwhile the Rock64 board has been released. And looks very attractive for this. USB3, 4GB of RAM, and finally SPI NOR which I so badly lack - are all the most desirable things! Kewl. The only annoying thing is not yet available SDRAM init sequence, so that you could at least repeat after it (what else to do if the spec is silent). But this is going to change, thanks to Rockchip's desire to be more open.
Whenever I make progress with my Allwinner boards, which, I believe, are of interest here, I'll report it here.
ANT - my hobby OS for x86 and ARM.