(11-03-2018, 08:43 PM)guannais Wrote: Thanks for the performance advice
Since "qemu" recompiles the code on the fly it may be a problem with the code generator for ARM. What is strange is that any A72 core should be binary compatible with any A53 one, just the armv8-a instruction set.
I was compiling with those flags:
which I inherited from the setup of my Odroid-C2.Code:CFLAGS="-march=armv8-a+simd+crc -mtune=cortex-a53 -mfix-cortex-a53-843419 -Os -pipe"
You welcome,
In theory,
Code:
-march=armv8-a+crypto+crc
Should enable: { "fp asimd" + "aes pmull sha1 sha2" } + { "crc32" }
But if you look into the definitions, that its not clear..
https://code.woboq.org/gcc/gcc/config/aa...s.def.html
So better do a explicit request:
Code:
-march=armv8-a+simd+crypto+crc
not sure about: " evtstrm : kernel event stream using generic architected timer.. "
I think that landed in gcc 8.x, when you use crypto, it already add fp+simd, but I don't know if its already in stable version.. so I tell him explicitly to use the extensions..