Linux Kernal Development - BETA Boards

[paulieg]

we're looking for 4 to 6gb [...] To clarify, the A64 is able to address upto 1TB of physical memory

Obviously you're looking for 4GB to 6GB. And I spoke about DRAM modules. You might get 4 GB total memory with 4x8Gb modules and you might get 6 GB using 4x12Gb modules. But this doesn't apply to the A64 since there is a 3GB limitation (and its memory bus is 32 bit anyway) regardless whether you accept that or not. 

I'll save my time and won't comment on the other stuff you wrote

I'll point out that a 32bit memory bus would result in a 4gb memory ceiling, not 3gb, which either means the 3GB ceiling is imposed as a software limit or there is a hardware limit not explicitly mentioned in the manual. LPAE on ARM processors results in a 40bit memory address window which does allow for 1TB - I think the only person who can clear this up would be A: Allwinner themselves as they built the damn thing or alternatively jjeng or one of the other team who have been working with the SoC for the last month - any takers?

I also wonder why you're mentioning such large memory modules for relatively small memory allocations - that makes little to no sense - the best analogy would be buying a Bugatti Veyron and Driving it back and forth to the shops at just 30mph.

There are two points of confusion here:
1. confusion between GB (gigabytes) and Gb (gigabits)
2. confusion between addressable virtual memory and accessible physical memory

1 requires no further explanation, only a note that using (k,m,g)bits to denote size of a memory chip is common in the ee world. 2 does, but enough has been written about it elsewhere that it doesn't need rewriting here. Suffice to say that x86-64 for example only uses 48 bits for translation in order to improve performance, therefore maximum theoretical physical memory size is 2^48 rather than 2^64 before we even get to any other limiting factors. You're going to need to know this, so it's worth reading up on.

-p