PINE64

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I would like to use the board for an autonomous robot project, but there's practically no information about available GPIO pins. I'm interested in the number of any pins that will be available to use as GPIO, PWM and I2C (if I would like to expand). Also, will it be possible to repurpose any of the pins on the I/O slots for GPIO?
(12-21-2015, 04:25 PM)shockr Wrote: [ -> ]I would like to use the board for an autonomous robot project, but there's practically no information about available GPIO pins. I'm interested in the number of any pins that will be available to use as GPIO, PWM and I2C (if I would like to expand). Also, will it be possible to repurpose any of the pins on the I/O slots for GPIO?

The IO pin definition already published at Pine64 wiki page (http://wiki.pine64.org).
Summary:

Connector layout:
http://wiki.pine64.org/images/7/7d/Pine6...nector.png

Pi-2 bus has same GPIO pinouts as a Raspberry Pi 2
Euler "e" bus offers additional SPI, UART and other pins
The picture linked from the wiki is at:
https://drive.google.com/file/d/0B0cEs0l...VrZHM/view
On the Raspberry Pi all the GPIO is input by default.
https://www.raspberrypi.org/documentatio.../README.md
Is it the same on the Pine64?
A couple of us have been discussing this issue this afternoon. It is at least a small consensus that it is an Arm convention to make all pins inputs with a weak internal pull-up resistor.

That said, the user manual is here:

http://files.pine64.org/doc/datasheet/pi...l_V1.0.pdf


What we know about the A64 SoC is in the user manual; I recommend reading it at your leisure.
(08-03-2016, 04:15 PM)MarkHaysHarris777 Wrote: [ -> ]It is at least a small consensus that it is an Arm convention to make all pins inputs with a weak internal pull-up resistor.

I assume using pull-up resistors is still recommended.
hi Wolfenstein, when I code for a pull-up on an input pin ( I'm going to put a switch on it that pulls to ground ) then I leave it with the internal pull-up ( why use an additional component if not needed ).

The place where you may need a 'stronger' pull-up is when the input is coming from an open collector output... in that case I always provide my own pull-up for the open collector.

In any case, I would not count on defaults. Something you will discover with the PineA64 GPIO channels is that they appear to always be in use the first time they are used (you'll get the already in use warning, even though they are not in use ) this does not occur with the Raspberry PI... and is probably a bug in the RPi.GPIO-PineA64 code.

I usually call GPIO.cleanup() and exit, then run the code fresh... to get around the bug.

All the registers are in the manual... read through there and see what you can discover.
I know this post is a bit old, I'm just getting started with the Pine64 board I purchased a bit ago and looking at the Pi-2 GPIO connections, these are similar to the Rapberry Pi and Beaglebone Black. Derek Molloy has a couple of books for each board, as well as a website for each, and the data in the books could be applied to the Pine64 board. One thing is that the data for the GPIO mappng can be obatined by looking under the '/sys/kernel/debug/pinctrl/' folder. The mappings for the Pi-2 can be found in '/sys/kernel/debug/pinctrl/1c20800.pinctrl/pinmux-pins'. This requires root access to get the pinctrl though.

Example:

# cat pinmux-pins

Pinmux settings per pin
Format: pin (name): mux_owner gpio_owner hog?
pin 32 (PB0): 1c28800.uart (GPIO UNCLAIMED) function uart2 group PB0
pin 33 (PB1): 1c28800.uart (GPIO UNCLAIMED) function uart2 group PB1
pin 34 (PB2): 1c28800.uart (GPIO UNCLAIMED) function uart2 group PB2
pin 35 (PB3): 1c28800.uart (GPIO UNCLAIMED) function uart2 group PB3
pin 36 (PB4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 37 (PB5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 38 (PB6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 39 (PB7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 40 (PB8): 1c28000.uart (GPIO UNCLAIMED) function uart0 group PB8
pin 41 (PB9): 1c28000.uart (GPIO UNCLAIMED) function uart0 group PB9
pin 64 (PC0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 65 (PC1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 66 (PC2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 67 (PC3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 68 (PC4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 69 (PC5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 70 (PC6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 71 (PC7): (MUX UNCLAIMED) 1c20800.pinctrl:71
pin 72 (PC8): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 73 (PC9): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 74 (PC10): (MUX UNCLAIMED) (GPIO UNCLAIMED)

I have configured Pin 71 so shows being claimed by '1c20800.pinctrl:71'

The User Guide is very cool.

Cheers