08-13-2022, 06:54 PM
(This post was last modified: 08-14-2022, 04:06 PM by Randomuser.
Edit Reason: Adding extra info.
)
So I've been debugging various things on my RK3566 based soquartz and standard debugging is becoming insufficient for my needs. Hardware tracing would be really nice to have and there is Coresight ETM support in Linux.
However before I spend lots of time trying to get it working can someone clarify for me if RK3566 actually has a functioning Coresight ETM component? If yes, is it version ETMv4 and what subcomponents it has(trace funnel? anything else)?
The RK3568 (that is supposedly very similar to rk3566) TRM document claims rk3568 has DAP-Lite2 debug component which is described on ARM;s website as "a simple debug component with no tracing capability."
So if there is no tracing capability why does the ROM table contain tracing components for each CPU? (listing below)
It is clear we have a CTI, a PMU and an ETM for each core. Can anyone confirm/deny if those can be made to work?
BTW. If anyone is interested how to do hardware level debug on Quartz64 I wrote a quick description here: http://notes.zahoryzontnik.com/
However before I spend lots of time trying to get it working can someone clarify for me if RK3566 actually has a functioning Coresight ETM component? If yes, is it version ETMv4 and what subcomponents it has(trace funnel? anything else)?
The RK3568 (that is supposedly very similar to rk3566) TRM document claims rk3568 has DAP-Lite2 debug component which is described on ARM;s website as "a simple debug component with no tracing capability."
So if there is no tracing capability why does the ROM table contain tracing components for each CPU? (listing below)
Code:
AP # 0x0
AP ID register 0x24770002
Type is MEM-AP APB2 or APB3
MEM-AP BASE 0x80000003
Valid ROM table present
Component base address 0x80000000
Peripheral ID 0x0000080000
Designer is 0x000, <invalid>
Part is 0x000, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory not present: dedicated debug bus
ROMTABLE[0x0] = 0x01000003
Component base address 0x81000000
Peripheral ID 0x04007bb4e3
Designer is 0x23b, ARM Ltd
Part is 0x4e3, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x00, Miscellaneous, other
Dev Arch is 0x47700af7, ARM Ltd "CoreSight ROM architecture" rev.0
Type is ROM table
MEMTYPE system memory not present: dedicated debug bus
[L01] ROMTABLE[0x0] = 0x00001006
Component not present
[L01] ROMTABLE[0x4] = 0x00002006
Component not present
[L01] ROMTABLE[0x8] = 0x00004003
Component base address 0x81004000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x15, Debug Logic, Processor
Dev Arch is 0x47708a15, ARM Ltd "Processor debug architecture (v8.2-A)" rev.0
[L01] ROMTABLE[0xc] = 0x00005003
Component base address 0x81005000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x15, Debug Logic, Processor
Dev Arch is 0x47708a15, ARM Ltd "Processor debug architecture (v8.2-A)" rev.0
[L01] ROMTABLE[0x10] = 0x00006003
Component base address 0x81006000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x15, Debug Logic, Processor
Dev Arch is 0x47708a15, ARM Ltd "Processor debug architecture (v8.2-A)" rev.0
[L01] ROMTABLE[0x14] = 0x00007003
Component base address 0x81007000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x15, Debug Logic, Processor
Dev Arch is 0x47708a15, ARM Ltd "Processor debug architecture (v8.2-A)" rev.0
[L01] ROMTABLE[0x18] = 0x00008002
Component not present
[L01] ROMTABLE[0x1c] = 0x00009002
Component not present
[L01] ROMTABLE[0x20] = 0x0000a002
Component not present
[L01] ROMTABLE[0x24] = 0x0000b002
Component not present
[L01] ROMTABLE[0x28] = 0x0000c003
Component base address 0x8100c000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x16, Performance Monitor, Processor
Dev Arch is 0x47702a16, ARM Ltd "Processor Performance Monitor (PMU) architecture" rev.0
[L01] ROMTABLE[0x2c] = 0x0000d003
Component base address 0x8100d000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x16, Performance Monitor, Processor
Dev Arch is 0x47702a16, ARM Ltd "Processor Performance Monitor (PMU) architecture" rev.0
[L01] ROMTABLE[0x30] = 0x0000e003
Component base address 0x8100e000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x16, Performance Monitor, Processor
Dev Arch is 0x47702a16, ARM Ltd "Processor Performance Monitor (PMU) architecture" rev.0
[L01] ROMTABLE[0x34] = 0x0000f003
Component base address 0x8100f000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x16, Performance Monitor, Processor
Dev Arch is 0x47702a16, ARM Ltd "Processor Performance Monitor (PMU) architecture" rev.0
[L01] ROMTABLE[0x38] = 0x00014003
Component base address 0x81014000
Peripheral ID 0x04007bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x14, Debug Control, Trigger Matrix
Dev Arch is 0x47701a14, ARM Ltd "Cross Trigger Interface (CTI) architecture" rev.0
[L01] ROMTABLE[0x3c] = 0x00015003
Component base address 0x81015000
Peripheral ID 0x04007bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x14, Debug Control, Trigger Matrix
Dev Arch is 0x47701a14, ARM Ltd "Cross Trigger Interface (CTI) architecture" rev.0
[L01] ROMTABLE[0x40] = 0x00016003
Component base address 0x81016000
Peripheral ID 0x04007bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x14, Debug Control, Trigger Matrix
Dev Arch is 0x47701a14, ARM Ltd "Cross Trigger Interface (CTI) architecture" rev.0
[L01] ROMTABLE[0x44] = 0x00017003
Component base address 0x81017000
Peripheral ID 0x04007bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x14, Debug Control, Trigger Matrix
Dev Arch is 0x47701a14, ARM Ltd "Cross Trigger Interface (CTI) architecture" rev.0
[L01] ROMTABLE[0x48] = 0x0001c003
Component base address 0x8101c000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x13, Trace Source, Processor
Dev Arch is 0x47724a13, ARM Ltd "Embedded Trace Macrocell (ETM) architecture" rev.2
[L01] ROMTABLE[0x4c] = 0x0001d003
Component base address 0x8101d000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x13, Trace Source, Processor
Dev Arch is 0x47724a13, ARM Ltd "Embedded Trace Macrocell (ETM) architecture" rev.2
[L01] ROMTABLE[0x50] = 0x0001e003
Component base address 0x8101e000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x13, Trace Source, Processor
Dev Arch is 0x47724a13, ARM Ltd "Embedded Trace Macrocell (ETM) architecture" rev.2
[L01] ROMTABLE[0x54] = 0x0001f003
Component base address 0x8101f000
Peripheral ID 0x04003bbd05
Designer is 0x23b, ARM Ltd
Part is 0xd05, Unrecognized
Component class is 0x9, CoreSight component
Type is 0x13, Trace Source, Processor
Dev Arch is 0x47724a13, ARM Ltd "Embedded Trace Macrocell (ETM) architecture" rev.2
[L01] ROMTABLE[0x58] = 0x00000002
Component not present
[L01] ROMTABLE[0x5c] = 0x00000002
Component not present
It is clear we have a CTI, a PMU and an ETM for each core. Can anyone confirm/deny if those can be made to work?
BTW. If anyone is interested how to do hardware level debug on Quartz64 I wrote a quick description here: http://notes.zahoryzontnik.com/