C GPIO

[KnReLe]

Not sure if this worked yet for you, but I do see one thing here that looks to me like it could be the reason why your /dev/mem -related gpio access doesn't work: the registers in which the various bits are changed in order to control gpio items are 32-bits, while the pointer-arithmetic that is shown here looks like they deal with 64-bit data sizes.

Looking at the documentation in the linked user-manual, page 373. we see how the addresses for the  PB thru PH gpio control space is organized. The base address is 0x1c20800, which as it isn't page aligned means we will have to pass the masked address to mmap() and then add the offset to the returned pointer afterwards.

Next we see that each letter-block of ports has a group of 9 registers each of which are 32 bits or 4 bytes, so the first (non-existent) PA series would have been from 0x00 to 0x23, then PB continues at 0x24-0x47, then PC goes from 0x48--0x6b and so on.  So far so good.

The problems begin with this:
---------------------
gpio = (volatile unsigned long *) p_mem;
------------------------
The type of the pointer variable gpio isn't shown but the cast suggests it is a volatile unsigned long *gpio; Though the numerical value of this (if we were to use printf("%p") to display it) isn't necessarily the original address 0x01c20000 that we used, it is still effectively pointing at this hardware location, which is 0x800 bytes before the gpios.

Now when we add offsets to such a pointer, these offsets get multiplied by 8, since the size of the unsigned long type in the PineA64 is 8, and thus, when performing the access call:

*(gpio + GPIO_REG_OFFSET + 0x48) &= ~(7 << 16);

being equivalent to

gpio[GPIO_REG_OFFSET+0x48] &= ~(7 << 16);

it is like we are changing some bits in an 8-byte variable located at:
(*0x01c20000+8 * (0x800 + 0x48)) = 0x01c24090

which is far beyond the area where these GPIO control registers actually are.  The arithmetic shown seems to expect that the gpio pointers are to 1-byte data however.

Thus to make this work right, the pointer through which we access the GPIOs have to be defined as pointing to some 32-bit integers, while the arithmetic used for adding the offsets and registers will have to be done as if the pointers are aligned at byte boundaries, so the arithmetic I use here treats it as char *, or we can cast them back and forth from unsigned integers of the appropriate size.

To be sure how big things are, in places like this when we do care, the standard types in stdint.h are nice to have.  I got the following C program working, flashing an LED connected to pin 32 on the Pi-2-bus (P32 as it is labeled on the development POT), which is PC4.

#include <stdlib.h>
#include <stdio.h>
#include <stdint.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>

#define BASE_ADDR 0x01c20000
#define GPIO_REG_OFFSET 0x800

int main()
{
   int fd;
   void *p_mem;
   volatile uint32_t *gpio;    /* The registers in gpio-space are 32-bits wide. */
   unsigned int offset;        /* offsets from 0x800, so need not be that big */
   unsigned int page_size;     /* Page-size from system, it reports 0x1000 here. */
   int j;

   page_size = sysconf(_SC_PAGESIZE);

   fd = open("/dev/mem", O_RDWR | O_SYNC);
   if(fd == -1)
   {
       /* Very likely if you forget to run this as root ... */
       perror("/dev/mem");
       return(0);
   }

   p_mem = mmap(NULL, page_size * 2, PROT_READ | PROT_WRITE, MAP_SHARED, fd, BASE_ADDR);
   if(p_mem == NULL)
   {
       perror("mmap");
       close(fd);
       return(0);
   }

   close(fd);

   offset = GPIO_REG_OFFSET + 0x48;  /* Will aim at the first of the PC control registers, which controls PC7-PC0 */
                                       /* Page 377 in the manual */

   gpio = (volatile uint32_t *) ( (char *) (p_mem) + offset);
   printf("GPIOs at %p\n", gpio);

   *(gpio) &= ~(7 << 16);  /* Set SELECT to 000 for enable or input */
   *(gpio) |= (1 << 16);   /* Set SELECT to 001 for output */

   offset = GPIO_REG_OFFSET + 0x58;  /* Will aim at the the PC data register, which controls state of PC18-PC0 wires */
                                       /* Page 380 in the manual. */
   gpio = (volatile uint32_t *) ( (char *) (p_mem) + offset);
   printf("GPIOs at %p\n", gpio);

   /* flash on and off 20 times */
   for(j = 0; j<20; j++)
   {
       *(gpio) &= ~(0x10);  /* Set bit 4 for PC4 to 0 */
       usleep(500000);
       *(gpio) |= (0x10);   /* Set bit 4 for PC4 to 1 */
       usleep(500000);
   }

   munmap(p_mem, page_size*2);

   return(0);
}

The key thing here is the additions here:

gpio = (volatile uint32_t *) ( (char *) (p_mem) + offset);

where the un-specific pointer p_mem gets cast to a pointer-to-char which has alignment 1, then the offset gets added, and the resulting value is cast to the pointer-to-uint32_t through which we will access the selected 32-bit control or data register.